Device parameter optimization for reduced short channel effects in retrograde doping MOSFET

IEEE Transactions on Electron Devices

Volumn 43, Issue 2, 1996, Pages 365-368

  Agrawal, Bhavna ^a,b   De Vivek, K ^a,c   Meindl, James D ^a,c  

^a RENSSELAER POLYTECHNIC INSTITUTE   (United States)

^b IBM T J WATSON RESEARCH CENTER   (United States)

^c GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; NUMERICAL ANALYSIS; OPTIMIZATION; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DOPING; SILICON ON INSULATOR TECHNOLOGY; SUBSTRATES;

CONSTANT THRESHOLD VOLTAGE; DEVICE PARAMETER OPTIMIZATION; SHORT CHANNEL EFFECTS;

MOSFET DEVICES;

EID: 0030080950     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.481743     Document Type: Article

References (12)

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