Balance testing and balance-testable design of logic circuits

Journal of Electronic Testing: Theory and Applications (JETTA)

Volumn 8, Issue 1, 1996, Pages 71-86

  Chakrabarty, Krishnendu ^a   Hayes, John P ^a  

^a BOSTON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC FAULT CURRENTS; ELECTRIC FAULT LOCATION; LOGIC DESIGN;

BUILT IN SELF TESTING; DESIGN FOR TESTABILITY; FAULT COVERAGE;

LOGIC CIRCUITS;

EID: 0030080374     PISSN: 09238174     EISSN: None     Source Type: Journal    
DOI: 10.1007/BF00136077     Document Type: Article

References (27)