Fast computation of substrate resistances in large circuits

Proceedings of European Design and Test Conference

Volumn , Issue , 1996, Pages 560-565

  van Genderen, A J ^a   van der Meijs, N P ^a   Smedes, T ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; ELECTRIC RESISTANCE; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; SUBSTRATES;

SUBSTRATE COUPLING EFFECTS; SUBSTRATE RESISTANCE;

INTEGRATED CIRCUITS;

EID: 0029778023     PISSN: 10661409     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)