High-linearity sampling technique for switched-current circuits

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 43, Issue 1, 1996, Pages 49-52

  Nairn, D G ^a  

^a QUEEN S UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ELECTRIC RESISTANCE; ELECTRIC SWITCHES; ERRORS; SAMPLING; TRANSCONDUCTANCE;

CURRENT MODE SAMPLE AND HOLD TECHNIQUE; HIGH LINEARITY SAMPLING TECHNIQUE; SIGNAL DEPENDENT CHARGE INJECTION; SWITCHED CAPACITOR CIRCUITS; SWITCHED CURRENT CIRCUITS; ZERO VOLTAGE SWITCHING;

SWITCHING CIRCUITS;

EID: 0029752577     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.481474     Document Type: Article

References (13)

1. Switched-Currents: An Analog Technique for Digital Technology 1993 Peter Peregrinus U.K., London
2. G. C. Temes P. Deval V. Valencic SC circuits: The state of the art compared to SI techniques Proc. 1993 IEEE Int. Symp. Circuits Syst. 1231 1234 Proc. 1993 IEEE Int. Symp. Circuits Syst. 1993-May
3. S. J. Daubert D. Vallancourt Y. P. Tsividis Current copier cells Electron. Lett. 24 1560 1561 1988
4. H. C. Yang T. S. Fiez D. J. Allstot Current-feedthrough effects and cancellation techniques in switched-current circuits Proc. 1990 IEEE Int. Symp. Circuits Syst. 3186 3189 Proc. 1990 IEEE Int. Symp. Circuits Syst. 1990-May
5. J. B. Hughes K. W. Moulding S2I: A two-step approach to switched-currents Proc. 1993 IEEE Int. Symp. Circuits Syst. 1235 1238 Proc. 1993 IEEE Int. Symp. Circuits Syst. 1993-May
6. D. G. Nairn C. A. T. Salama A ratio-independent algorithmic analog-to-digital converter combining current-mode and dynamic techniques IEEE Trans. Circuits Syst. 37 319 325 Mar. 1990
7. C. Toumazou J. B. Hughes D. M. Pattullo A regulated cascode switched-current memory cell Electron. Lett. 26 303 304 1990
8. R. H. Zele D. J. Allstot Low-voltage fully differential CMOS switched-current filters Proc. IEEE Custom Integrated Circuits Conf. 6.2.1 6.2.4 Proc. IEEE Custom Integrated Circuits Conf. 1993
9. J. B. Hughes K. W. Moulding An 8 MHz, 80 MS/s switched-current filter IEEE Int. Solid-State Circuits Conf. 60 61 IEEE Int. Solid-State Circuits Conf. 1994-Feb.
10. P. Deval J. Robert M. J. Declercq A 14 bit CMOS A/D based on dynamic current memories IEEE 1991 Custom Integrated Circuits Conf. Proc. 24.2.1 24.2.4 IEEE 1991 Custom Integrated Circuits Conf. Proc. 1991
11. K. C. Hsieh P. R. Gray D. Senderowicz D. Messerschmitt A low-noise chopper-stabilized differential switched capacitor filtering technique IEEE J. Solid-State Circuits SC-16 708 715 Dec. 1981
12. E. A. Vittoz Design of MOS VLSI Circuits for Telecommunications 1985 Prentice-Hall NJ, Englewood Cliffs Dynamic analog techniques
13. D. G. Nairn Zero-voltage switching in switched current circuits Proc. 1994 IEEE Int. Symp. Circuits Syst. 289 292 Proc. 1994 IEEE Int. Symp. Circuits Syst. 1994-May