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Volumn , Issue , 1996, Pages 184-189
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Mapping statechart models onto an FPGA-based ASIP architecture
a
a
SIEMENS AG
(Germany)
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Author keywords
[No Author keywords available]
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Indexed keywords
APPLICATION SPECIFIC INTEGRATED CIRCUITS;
COMPUTER HARDWARE DESCRIPTION LANGUAGES;
COMPUTER SIMULATION;
CONFORMAL MAPPING;
DATA STRUCTURES;
INDUSTRIAL APPLICATIONS;
INTERFACES (COMPUTER);
LOGIC GATES;
MICROCOMPUTERS;
OPTIMIZATION;
SHIFT REGISTERS;
APPLICATION SPECIFIC HARDWARE CONTROL BLOCK;
APPLICATION SPECIFIC INSTRUCTION PROCESSORS;
CENTRAL PROCESSING UNIT;
FIELD PROGRAMMABLE GATE ARRAY;
MAPPING STATECHART MODELS;
VERILOG HARDWARE DESCRIPTION LANGUAGES;
LOGIC DESIGN;
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EID: 0029752183
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
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Times cited : (10)
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References (19)
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