A 0.10 μm NMOSFET, made by hybrid lithography (e-beam/DUV), with indium pocket and specific gate reoxidation process

Microelectronic Engineering

Volumn 30, Issue 1-4, 1996, Pages 459-462

  Benistant, F ^a   Tedesco, S ^a   Guegan, G ^a   Martin, F ^a   Heitzmann, M ^a   Dal'Zotto, B ^a  

^a CEA LETI   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; DEPOSITION; ELECTRON BEAM LITHOGRAPHY; GATES (TRANSISTOR); INDIUM; ION IMPLANTATION; MICROELECTRONIC PROCESSING; PHOTOLITHOGRAPHY; PHOTORESISTS;

CHEMICAL AMPLIFIED RESIST; DIRECT ULTRAVIOLET LITHOGRAPHY; GATE OXIDE; INDIUM POCKET; REOXIDATION PROCESS; SHORT CHANNEL EFFECT;

MOSFET DEVICES;

EID: 0029752162     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/0167-9317(95)00287-1     Document Type: Article

References (6)

1. F. Benistant et al., ESSDERC'95, to be published
2. P. Zandbergen et al., Microel. Engineering 23 (1994) p. 299
3. R. Jonckheere et al., Microel. Engineering 27 (1995) p. 231
4. o4, 1984, p.452
5. o3 (1991), p.487
6. G.Guegan, ESSDERC Tech. Dig. 1990, p.120