Design of an ASIC architecture for high speed fractal image compression

Proceedings of the Annual IEEE International ASIC Conference and Exhibit

Volumn , Issue , 1996, Pages 223-226

  Ancarani, F ^a   De Gloria, A ^a   Olivieri, M ^a   Stazzone, C ^a  

^a UNIVERSITY OF GENOA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; FRACTALS; IMAGE COMPRESSION; INTEGRATED CIRCUIT LAYOUT; INTERFACES (COMPUTER); PERSONAL COMPUTERS;

GRAY LEVEL IMAGES; MONOCHROMATIC IMAGES; VERY HIGH DESCRIPTION LANGUAGES;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 0029751707     PISSN: 10630988     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)