Assessing MOS gate oxide reliability on wafer level with ramped/constant voltage and current stress

International Integrated Reliability Workshop Final Report

Volumn , Issue , 1996, Pages 81-91

  Martin, Andreas ^a   Suehle, John ^a   Chaparala, Prasad ^a   O'Sullivan, Paula ^a   Mathewson, Alan ^a   Messick, Cleston ^a  

^a UNIVERSITY COLLEGE CORK   (Ireland)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC BREAKDOWN OF SOLIDS; ELECTRIC CHARGE; GATES (TRANSISTOR); OXIDES; RELIABILITY;

CHARGE TRAPPING; CURRENT STRESS; MOS GATE OXIDES; RAMPED/CONSTANT VOLTAGE; WAFER LEVEL RELIABILITY ASSESSMENT;

MOS DEVICES;

EID: 0029737185     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)