A Multi-Terminal Net Router for Field-Programmable Gate Arrays

VLSI Design

Volumn 4, Issue 1, 1996, Pages 1-10

  Bhata, Dinesh ^a   Chowdhary, Amit ^b  

^a University of Cincinnati   (United States)

^b UNIVERSITY OF MICHIGAN   (United States)

Author keywords

Field Programmable Gate Arrays; Routing; VLSI

Indexed keywords

APPROXIMATION THEORY; LOGIC GATES; PROBABILITY; TREES (MATHEMATICS); VLSI CIRCUITS;

DIRECT ROUTING; GLOBAL ROUTING; STEINER TREE;

INTEGRATED CIRCUIT LAYOUT;

EID: 0029734965     PISSN: 1065514X     EISSN: None     Source Type: Journal    
DOI: 10.1155/1996/79127     Document Type: Article

References (9)

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