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Volumn , Issue , 1996, Pages 199-202
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MPEG-2 video decoder DSP architecture
a a |
Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
COMPUTER ARCHITECTURE;
DECODING;
DIGITAL STORAGE;
IMAGE COMPRESSION;
IMAGE CONVERTERS;
MICROPROCESSOR CHIPS;
DIGITAL SIGNAL PROCESSOR (DSP);
SEMISTATIC SCHEDULING SCHEME;
VIDEO DECODER ARCHITECTURE;
VIDEO SIGNAL PROCESSING;
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EID: 0029727450
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (2)
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References (6)
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