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Volumn 5, Issue 1, 1996, Pages 77-87

TOGAPS: A Testability Oriented Genetic Algorithm for Pipeline Synthesis

Author keywords

BILBO architecture; Data path synthesis; evolutionary programming; genetic algorithm; pipeline synthesis; testability oriented synthesis

Indexed keywords

GRAPH THEORY; HEURISTIC METHODS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL OPERATORS; VLSI CIRCUITS;

EID: 0029725272     PISSN: 1065514X     EISSN: None     Source Type: Journal    
DOI: 10.1155/1996/65320     Document Type: Article
Times cited : (5)

References (15)
  • 1
    • 0026618697 scopus 로고
    • Allocation and assignment in high-level synthesis for self-testable data paths
    • L. Avra. Allocation and assignment in high-level synthesis for self-testable data paths. In Proceedings of International Test Conference, pages 463–472, 1991.
    • (1991) Proceedings of International Test Conference , pp. 463-472
    • Avra, L.1
  • 11
    • 0027961564 scopus 로고
    • Calculation of minimum number of registers in arbitrary life time cycles
    • Calcutta, India
    • K.K. Parhi. Calculation of minimum number of registers in arbitrary life time cycles. In Proceedings of the VLSI Design 1994 Conference, 1994. Calcutta, India.
    • (1994) Proceedings of the VLSI Design 1994 Conference
    • Parhi, K.K.1
  • 13
    • 0024682923 scopus 로고
    • Force directed scheduling for the behavioral synthesis of ASICs
    • P.G. Paulin and J.P. Knight. Force directed scheduling for the behavioral synthesis of ASICs. IEEE Transactions of CAD, 8(6):661–679, 1989.
    • (1989) IEEE Transactions of CAD , vol.8 , Issue.6 , pp. 661-679
    • Paulin, P.G.1    Knight, J.P.2
  • 14
    • 0029272215 scopus 로고
    • A genetic algorithm for mapping tasks onto a reconfigurable parallel processor
    • March
    • C.P. Ravikumar and A.K. Gupta. A genetic algorithm for mapping tasks onto a reconfigurable parallel processor. IEE Proceedings (E); 142:81–86, March 1995.
    • (1995) IEE Proceedings (E) , vol.142 , pp. 81-86
    • Ravikumar, C.P.1    Gupta, A.K.2
  • 15
    • 0028723004 scopus 로고
    • Data Path Synthesis
    • December Tutorial
    • L. Stok. Data Path Synthesis. Integration, the VLSI Journal, pages 1–71, December 1994. Tutorial.
    • (1994) Integration, the VLSI Journal , pp. 1-71
    • Stok, L.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.