Wave pipeline effect on LUT-based FPGA architectures

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 1996, Pages 45-50

  Boemo, Eduardo I ^a   Lopez Buedo, Sergio ^a   Meneses, Juan M ^a  

^a UNIVERSIDAD POLITÉCNICA DE MADRID   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; COMPUTER ARCHITECTURE; DELAY CIRCUITS; DIGITAL CIRCUITS; ELECTRIC NETWORK TOPOLOGY; INTERCONNECTION NETWORKS; LOGIC GATES; MULTIPLYING CIRCUITS; PIPELINE PROCESSING SYSTEMS; RANDOM ACCESS STORAGE; TABLE LOOKUP;

COMBINATIONAL ARRAY; FIELD PROGRAMMABLE GATE ARRAY; WAVE PIPELINE EFFECT; XILINX CHIP;

LOGIC CIRCUITS;

EID: 0029725182     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/228370.228377     Document Type: Conference Paper

References (12)