First demonstration of A planar-type surface tunnel transistor (STT): Lateral interband tunnel device

Solid-State Electronics

Volumn 40, Issue 1-8, 1996, Pages 519-522

  Uemura, T ^a   Baba, T ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT DENSITY; ELECTRIC RESISTANCE; ELECTRON TUNNELING; GATES (TRANSISTOR); MOLECULAR BEAM EPITAXY; SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTING INDIUM COMPOUNDS; SEMICONDUCTOR DEVICE MANUFACTURE; TUNNEL DIODES;

DEVICE MINIATURIZATION; HIGH LEVEL INTEGRATION; NEGATIVE DIFFERENTIAL RESISTANCE; PEAK TO VALLEY CURRENT RATIO; PLANAR TYPE SURFACE TUNNEL TRANSISTOR;

TRANSISTORS;

EID: 0029725085     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/0038-1101(95)00281-2     Document Type: Article

References (10)

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