Verilog procedural interface for the Verilog hardware description language

Proceedings - IEEE International Verilog HDL Conference

Volumn , Issue , 1996, Pages 17-23

  Dawson, Charles ^a   Pattanam, Sathyam K ^a   Roberts, David ^a  

^a CADENCE DESIGN SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

PROGRAMMING LANGUAGE INTERFACE; USER DEFINED SYSTEM TASKS; VERILOG PROCEDURAL INTERFACE;

C (PROGRAMMING LANGUAGE); COMPUTER AIDED DESIGN; COMPUTER SIMULATION; INTERFACES (COMPUTER); OBJECT ORIENTED PROGRAMMING;

COMPUTER HARDWARE DESCRIPTION LANGUAGES;

EID: 0029724381     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)