New MPEG2 decoder architecture using frequency scaling

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 4, Issue , 1996, Pages 253-256

  Kim, Jeong Min ^a   Chae, Soo Ik ^a  

^a Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CLOCKS; COMPUTER ARCHITECTURE; DATA PROCESSING; DETECTOR CIRCUITS; DIGITAL COMPUTERS; ELECTRIC FREQUENCY CONTROL; SIGNAL GENERATORS;

CIRCUIT STATUS DETECTOR; CLOCK CONTROL WORD; CLOCKING; DATA DEPENDENT ALGORITHM; DATA INDEPENDENT ALGORITHM; DECODER; FREQUENCY SCALING; PROGRAMMABLE CLOCK GENERATOR;

DIGITAL CONTROL SYSTEMS;

EID: 0029724140     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)