Domain-specific high-level modeling and synthesis for ATM switch design using VHDL

Proceedings - Design Automation Conference

Volumn , Issue , 1996, Pages 585-590

  Lee, Mike Tien Chien ^a   Hsu, Yu Chin ^a   Chen, Ben ^a   Fujita, Masahiro ^a  

^a FUJITSU LABORATORIES OF AMERICA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS TRANSFER MODE; COMPUTER ARCHITECTURE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT LAYOUT; LOGIC DESIGN; LOGIC GATES; MATHEMATICAL MODELS; PACKET SWITCHING; PROGRAM COMPILERS; STORAGE ALLOCATION (COMPUTER);

BEHAVIOR MODELING; SYSTEM LEVEL ARCHITECTURE;

SWITCHING CIRCUITS;

EID: 0029724076     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/240518.240629     Document Type: Conference Paper

References (9)