DC-current-free low-power A/D converter circuitry using dynamic latch comparators with divided-capacitance voltage reference

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 4, Issue , 1996, Pages 205-208

  Kotani, Koji ^a   Shibata, Tadashi ^a   Ohmi, Tadahiro ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPARATOR CIRCUITS; COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC VARIABLES MEASUREMENT; ENERGY DISSIPATION; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUIT TESTING; MOSFET DEVICES;

CAPACITIVE VOLTAGE DIVIDER CONFIGURATION; DYNAMIC LATCH COMPARATORS; POWER DISSIPATION; REFERENCE VOLTAGE GENERATOR; THRESHOLD VOLTAGE; ULTRA CLEAN TECHNOLOGY;

ANALOG TO DIGITAL CONVERSION;

EID: 0029723894     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)