2ns access, 500MHz 288Kb SRAM MACRO

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 1996, Pages 128-129

  Pelella, Antonio R ^a   Lu, Pong Fei ^a   Chan, Yuen H ^a   Huott, William V ^a   Bakhru, Umesh ^a   Kowalczyk, Steven ^a   Patel, Pradip ^a   Rawlins, John ^a   Wu, Philip T ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; INTEGRATED CIRCUIT TESTING; LOGIC CIRCUITS; LOGIC GATES; SWITCHING CIRCUITS; TRANSISTORS;

HARDWARE WAVEFORMS; LASER BLOWN FUSES; PARALLEL DATA PORTS;

RANDOM ACCESS STORAGE;

EID: 0029723442     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)