156 Mbps CMOS clock recovery circuit for burst-mode transmission

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 1996, Pages 122-123

  Nakamura, Makoto ^a   Ishihara, Noboru ^a   Akazawa, Yukio ^a  

^a NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DATA COMMUNICATION SYSTEMS; DELAY CIRCUITS; ELECTRIC CURRENTS; FIELD EFFECT TRANSISTORS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; OSCILLATORS (ELECTRONIC); PHASE LOCKED LOOPS; VARIABLE FREQUENCY OSCILLATORS;

ASYNCHRONOUS DATA PACKETS; BURST DATA GENERATOR; CLOCK RECOVERY CIRCUIT; OSCILLATION FREQUENCY; RING OSCILLATOR;

CMOS INTEGRATED CIRCUITS;

EID: 0029723441     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)