Bifurcational communication with novel chaotic transistors circuits

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 1996, Pages 100-103

  Pham, Cong Kha ^a   Tanaka, Mamoru ^a  

^a TOKYO UNIVERSITY OF INFORMATION SCIENCES   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BIFURCATION (MATHEMATICS); CAPACITORS; CHAOS THEORY; ELECTRIC CHARGE; ELECTRIC DISCHARGES; ELECTRIC INVERTERS; MOSFET DEVICES; NETWORKS (CIRCUITS); RESISTORS; SYNCHRONIZATION; TRANSCEIVERS; TRANSISTORS;

BIFURCATIONAL COMMUNICATION; CHAOTIC TRANSISTOR CIRCUITS; TRANSCEIVER CIRCUIT;

CIRCUIT THEORY;

EID: 0029722544     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)