Modeling MOS snapback and parasitic bipolar action for circuit-level ESD and high current simulations

Annual Proceedings - Reliability Physics (Symposium)

Volumn , Issue , 1996, Pages 318-326

  Amerasekera, Ajith ^a   Ramaswamy, Sridhar ^a   Chang, Mi Chang, ^a   Duvvury, Charvaka ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR SEMICONDUCTOR DEVICES; COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC DISCHARGES; ELECTRIC NETWORK PARAMETERS; ELECTROSTATICS; LEAKAGE CURRENTS; PARAMETER ESTIMATION; PRODUCT DESIGN; SEMICONDUCTOR DEVICE MODELS;

CIRCUIT LEVEL SIMULATOR; ELECTROSTATIC DISCHARGE;

MOS DEVICES;

EID: 0029721803     PISSN: 00999512     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/relphy.1996.492137     Document Type: Conference Paper

References (32)