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Volumn , Issue , 1996, Pages 129-135
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Computing the discrete fourier transform on FPGA based systolic arrays
a
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
COMPUTER ARCHITECTURE;
COMPUTER SIMULATION;
DIGITAL ARITHMETIC;
DIGITAL SIGNAL PROCESSING;
FAST FOURIER TRANSFORMS;
LOGIC GATES;
RESPONSE TIME (COMPUTER SYSTEMS);
TIME DIVISION MULTIPLEXING;
CORDIC ARITHMETIC;
CUSTOM COMPUTING MACHINES;
DECIMATION IN TIME;
EXECUTION TIME;
FIELD PROGRAMMABLE GATE ARRAYS;
LOGIC CELL ARRAY;
PROCESSING ELEMENTS;
VIRTUAL COMPUTERS;
SYSTOLIC ARRAYS;
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EID: 0029720102
PISSN: None
EISSN: None
Source Type: None
DOI: 10.1145/228370.228389 Document Type: Conference Paper |
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Times cited : (11)
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References (10)
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