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Volumn , Issue , 1996, Pages 661-665
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Bit-level analysis of an SRT divider circuit
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
COMPUTER AIDED NETWORK ANALYSIS;
DECISION TABLES;
DIGITAL ARITHMETIC;
ELECTRIC NETWORK SYNTHESIS;
ERROR ANALYSIS;
ERROR DETECTION;
LOGIC DESIGN;
BINARY DECISION DIAGRAM (BDD);
BIT LEVEL ANALYSIS;
PENTIUM FLOATING POINT DIVIDER;
MULTIPLYING CIRCUITS;
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EID: 0029717587
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/240518.240643 Document Type: Conference Paper |
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Times cited : (25)
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References (16)
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