Identifying sequential redundancies without search

Proceedings - Design Automation Conference

Volumn , Issue , 1996, Pages 457-462

  Iyer, Mahesh A ^a   Long, David E ^a   Abramovici, Miron ^a  

^a SYNOPSYS INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMBINATORIAL CIRCUITS; COMPUTATIONAL COMPLEXITY; ELECTRIC NETWORK SYNTHESIS; FAULT TOLERANT COMPUTER SYSTEMS; FEEDBACK CONTROL; INTEGRATED CIRCUIT TESTING; MATHEMATICAL MODELS; OPTIMIZATION; REDUNDANCY; SEQUENTIAL CIRCUITS;

AUTOMATIC TEST GENERATION (ATG); FIRES ALGORITHM; SEQUENTIAL REDUNDANCY; SEQUENTIAL TEST GENERATORS;

LOGIC DESIGN;

EID: 0029716063     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/240518.240605     Document Type: Conference Paper

References (28)