IDCT processor on the adder-based distributed arithmetic

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 1996, Pages 36-37

  Chen, Chingson ^a   Chang, Tian Sheuan ^a   Jen, Chein Wei ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; ALGORITHMS; CMOS INTEGRATED CIRCUITS; FINITE AUTOMATA; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; INVERSE PROBLEMS; MATHEMATICAL TRANSFORMATIONS; OPTIMIZATION; RANDOM ACCESS STORAGE; ROM; TABLE LOOKUP;

ADDER BASED DISTRIBUTED ARITHMETIC; AUTO ROUTING; CMOS TECHNOLOGY; DISCRETE COSINE TRANSFORMS; FINITE STATE MACHINE; INVERSE DISCRETE COSINE TRANSFORMS; SUMMATION NETWORKS;

DIGITAL ARITHMETIC;

EID: 0029715112     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)