Identifying redundant path delay faults in sequential circuits

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 1996, Pages 406-411

  Tekumalla, Ramesh ^a   Menon, P R ^a  

^a UNIVERSITY OF MASSACHUSETTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; ERROR DETECTION; FAILURE ANALYSIS; INTEGRATED CIRCUIT TESTING; LOGIC CIRCUITS; MATHEMATICAL MODELS; VECTORS;

DELAY TESTING; REDUNDANT PATH DELAY FAULT; STATE TRANSITIONS;

SEQUENTIAL CIRCUITS;

EID: 0029713593     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)