Symbolic computation of logic implications for technology-dependent low-power synthesis

International Symposium on Low Power Electronics and Design, Digest of Technical Papers

Volumn , Issue , 1996, Pages 163-168

  Bahar, R I ^a   Burns, M ^a   Hachtel, G D ^a   Macii, E ^a   Shin, H ^a   Somenzi, F ^a  

^a BROWN UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK TOPOLOGY; ELECTRIC POWER SUPPLIES TO APPARATUS; HEURISTIC METHODS; LOGIC CIRCUITS; LOGIC GATES;

LOGIC NETWORK; LOW POWER DISSIPATION; POWER CONSUMPTION;

LOGIC DESIGN;

EID: 0029713487     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)