Mechanism of stress-induced leakage due to plasma charging and effect of oxide thickness

International Symposium on Plasma Process-Induced Damage, P2ID, Proceedings

Volumn , Issue , 1996, Pages 145-147

  Abadeer, W ^a   Hucckel, G ^a   Acovic, A ^a   Ray, A ^a  

^a IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; ELECTRIC BREAKDOWN; ELECTRON TUNNELING; GATES (TRANSISTOR); OXIDES; PLASMA ETCHING; SILICA; THIN FILMS;

ACCELERATED LIFE TESTING; BULK OXIDE ELECTRON TRAP GENERATION; INTERFACE STATE GENERATION; OXIDE THICKNESS; PLASMA CHARGING; PLASMA DAMAGE; POSITIVE CHARGE; STRESS INDUCED LEAKAGE BEHAVIOR; TRAP ASSISTED TUNNELING;

LEAKAGE CURRENTS;

EID: 0029711880     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)