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Volumn 4, Issue , 1996, Pages 556-559
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Joint scheduling and allocation for low power
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER AIDED DESIGN;
COMPUTER SIMULATION;
CORRELATION METHODS;
DIGITAL SIGNAL PROCESSING;
ELECTRIC POWER SUPPLIES TO APPARATUS;
ENERGY DISSIPATION;
ITERATIVE METHODS;
OPTIMIZATION;
SCHEDULING;
VLSI CIRCUITS;
BEHAVIORAL SYNTHESIS PROGRAM;
DATA MOVEMENT MINIMIZATION;
HARDWARE SHARING;
IDLE CYCLE ENFORCEMENT;
ITERATION;
JOINT SCHEDULING;
POWER CONSUMPTION;
POWER SAVING FACTOR;
REGISTER ALLOCATION;
INTEGRATED CIRCUIT LAYOUT;
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EID: 0029710379
PISSN: 02714310
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (3)
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References (7)
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