Use of sensitivities and generalized substrate models in mixed-signal IC design

Proceedings - Design Automation Conference

Volumn , Issue , 1996, Pages 227-232

  Miliozzi, Paolo ^a   Vassiliou, Iasson ^a   Charbon, Edoardo ^a   Malavasi, Enrico ^a   Sangiovanni Vincentelli, Alberto L ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; PARAMETER ESTIMATION; PHASE LOCKED LOOPS; SEMICONDUCTOR DEVICE MODELS; SENSITIVITY ANALYSIS; SPURIOUS SIGNAL NOISE; SUBSTRATES; VARIABLE FREQUENCY OSCILLATORS;

AUTOMATIC LAYOUT GENERATION; LAYOUT PARASITICS; MIXED SIGNAL INTEGRATED CIRCUITS; PARASITIC ESTIMATION TECHNIQUE; SUBSTRATE INDUCED NOISE;

INTEGRATED CIRCUIT LAYOUT;

EID: 0029710302     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/240518.240560     Document Type: Conference Paper

References (15)