Analysis and improvement of destruction immunity during reverse recovery for high voltage planar diodes under high dIrr/dt condition

IEEE International Symposium on Power Semiconductor Devices & ICs (ISPSD)

Volumn , Issue , 1996, Pages 353-356

  Tomomatsu, Y ^a   Suekawa, E ^a   Enjyoji, T ^a   Takeda, M ^a   Kondoh, H ^a   Hagino, H ^a   Yamada, T ^a  

^a Fukuryo Semicon Engineering Corporation   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC BREAKDOWN; ELECTRIC LOSSES; ELECTRIC NETWORK ANALYSIS; POWER ELECTRONICS; SEMICONDUCTOR DEVICE MODELS;

DESTRUCTION IMMUNITY; HIGH VOLTAGE PLANAR DIODES; MIXED MODE CALCULATION METHOD; POWER DIODES; REVERSE RECOVERY; TWO DIMENSIONAL ELECTROTHERMAL MODEL;

SEMICONDUCTOR DIODES;

EID: 0029709791     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)