Novel damascene process for one mask via/interconnect formation

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1996, Pages 118-119

  Nguyen, Tue ^a   Ulrich, Bruce D ^a   Allen, Lynn R ^a   Evans, David R ^a  

^a Sharp Microelectronics Technology Inc Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL POLISHING; DEPOSITION; DIELECTRIC MATERIALS; ETCHING; LIGHT TRANSMISSION; MASKS; METALLIZING; OXIDES; PHOTORESISTS; SEMICONDUCTOR DEVICE STRUCTURES;

BILEVEL RESIST; CHEMICAL MECHANICAL POLISHING; DAMASCENE PROCESS; INTERCONNECT PATTERN; INTERLEVEL DIELECTRIC MATERIALS; METAL DEPOSITION; METAL INTERCONNECTS; SUBMICRON STRUCTURES;

SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 0029709536     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)