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Volumn , Issue , 1996, Pages 50-55
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Accurate interconnection length estimation for computer logic
a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER AIDED DESIGN;
ESTIMATION;
INTEGRATED CIRCUIT LAYOUT;
INTERCONNECTION NETWORKS;
OPTIMIZATION;
PRINTED CIRCUIT DESIGN;
COMPUTER LOGIC;
VLSI CIRCUITS;
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EID: 0029708194
PISSN: 10661395
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (22)
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References (12)
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