Evolvable hardware with genetic learning

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 4, Issue , 1996, Pages 29-32

  Higuchi, Tetsuya ^a   Iwata, Masaya ^a   Kajitani, Isamu ^a   Yamada, Hitoshi ^a   Manderick, Bernard ^a   Hirao, Yuji ^a   Murakawa, Masahiro ^a   Yoshizawa, Shuji ^a   Furuya, Tatsumi ^a  

^a ELECTROTECHNICAL LABORATORY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

GENETIC ALGORITHMS; LEARNING SYSTEMS; LOGIC DESIGN; LOGIC DEVICES; LOGIC GATES; NEURAL NETWORKS; PATTERN RECOGNITION SYSTEMS; ROBOTICS;

EVOLVABLE HARDWARE; FIELD PROGRAMMABLE GATE ARRAYS; GATE LEVEL EVOLUTION; GENETIC LEARNING; PROGRAMMABLE LOGIC DEVICES; WELDING ROBOT CONTROLLER;

COMPUTER HARDWARE;

EID: 0029707848     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)