High speed programming scheme for multi-level NAND flash memory

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 1996, Pages 170-171

  Choi, Young Joon ^a   Suh, Kang Deog ^a   Koh, Yong Nam ^a   Park, Jong Wook ^a   Lee, Ki Jong ^a   Cho, Yun Jin ^a   Suh, Byung Hoon ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BUFFER STORAGE; COMPARATOR CIRCUITS; COMPUTER PROGRAMMING; DATA TRANSFER; ELECTRIC VARIABLES MEASUREMENT; ERROR CORRECTION; NAND CIRCUITS; SHIFT REGISTERS; TRANSISTORS;

HIGH SPEED PROGRAMMING SCHEME; INTELLIGENT INCREMENTAL STEP PULSE PROGRAMMING; MULTILEVEL CELL FLASH TECHNOLOGY; NAND FLASH MEMORY; OVERPROGRAMMING; PROGRAMMING LOOP COUNTER; REFERENCE LOOP SUBSTRACTER; THRESHOLD VOLTAGE PROGRAMMING; WAVEFORM MEASUREMENT;

NONVOLATILE STORAGE;

EID: 0029707030     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)