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Volumn , Issue , 1996, Pages 295-311

Choice of models and failure indicators for thermally loaded solder joints

Author keywords

[No Author keywords available]

Indexed keywords

CHIP ON LEAD CONFIGURATION; FAILURE INDICATORS; LEAD ON CHIP CONFIGURATION; SOLDER REFLOW; THIN SMALL OUTLINE PACKAGES; VIRTUAL STRUCTURE CONCEPT;

EID: 0029705661     PISSN: 04700155     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (1)

References (26)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.