Power management technique for 1-V LSIs using embedded processor

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 1996, Pages 111-114

  Shigematsu, Satoshi ^a   Mutoh, Shin'ichiro ^a   Matsuya, Yasuyuki ^a  

^a NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; LEAKAGE CURRENTS; LOGIC GATES; MOSFET DEVICES; SWITCHES;

EMBEDDED SMALL PROCESSOR; MULTI THRESHOLD VOLTAGE CMOS CIRCUIT; POWER MANAGEMENT PROCESSOR; POWER MANAGEMENT TECHNIQUE;

LSI CIRCUITS;

EID: 0029702298     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)