Test chip for ISFET/CMNOS technology development

IEEE International Conference on Microelectronic Test Structures

Volumn , Issue , 1996, Pages 123-128

  Lui, A ^a   Margesin, B ^a   Zanini, V ^a   Zen, M ^a   Soncini, G ^a   Martinoia, S ^a  

^a ITC IRST   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRONIC PROPERTIES; FIELD EFFECT TRANSISTORS; GATES (TRANSISTOR); INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; ION SENSITIVE FIELD EFFECT TRANSISTORS; LINEAR INTEGRATED CIRCUITS; NITRIDES; OXIDES; SEMICONDUCTING FILMS;

ANALOG INTEGRATED CIRCUITS; COMPLEMENTARY METAL GATE NITRIDE OXIDE SEMICONDUCTOR; ELECTROCHEMICAL CHARACTERISTICS; ON CHIP SIGNAL CONDITIONING; TEST CHIP; TEST STRUCTURES;

CHEMICAL SENSORS;

EID: 0029702296     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)