Time-multiplexed routing resources for FPGA design

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 1996, Pages 152-155

  Lin, Chih chang ^a   Chang, Douglas ^a   Wu, Yu Liang ^a   Marek Sadowska, Malgorzata ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER SOFTWARE; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT LAYOUT; RANDOM ACCESS STORAGE; TABLE LOOKUP;

FIELD PROGRAMMABLE GATE ARRAYS; PROGRAMMABLE ROUTING SWITCH;

LOGIC GATES;

EID: 0029701851     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)