Synthesizing multi-phase HDL programs

Proceedings - IEEE International Verilog HDL Conference

Volumn , Issue , 1996, Pages 67-76

  Cheng, Szu Tsung ^a   Brayton, Robert K ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTER SIMULATION; COMPUTER SOFTWARE; FINITE AUTOMATA; GRAPHIC METHODS; INTEGER PROGRAMMING; ITERATIVE METHODS; LINEAR PROGRAMMING; REAL TIME SYSTEMS; USER INTERFACES;

FINITE STATE MACHINES; INTEGER LINEAR PROGRAMMING; TIMING CONSTRAINED SYSTEMS;

COMPUTER HARDWARE DESCRIPTION LANGUAGES;

EID: 0029700552     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (22)