Reducing power dissipation after technology mapping by structural transformations

Proceedings - Design Automation Conference

Volumn , Issue , 1996, Pages 789-794

  Rohfleisch, Bernhard ^a   Koelbl, Alfred ^a   Wurth, Bernd ^a  

^a TECHNICAL UNIVERSITY OF MUNICH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CONSTRAINT THEORY; ELECTRIC LOSSES; ELECTRIC NETWORK SYNTHESIS; EQUIVALENT CIRCUITS; INTEGRATED CIRCUIT TESTING; LOGIC GATES; MATHEMATICAL MODELS; MATHEMATICAL TRANSFORMATIONS; OPTIMIZATION; POWER CONTROL; VLSI CIRCUITS;

AUTOMATIC TEST PATTERN GENERATION (ATPG); LOGIC SYNTHESIS;

LOGIC DESIGN;

EID: 0029699368     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/240518.240667     Document Type: Conference Paper

References (18)