Multi-configuration: a DFT technique for analog circuits

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1996, Pages 54-59

  Renovell, M ^a   Azais, F ^a   Bertrand, Y ^a  

^a LIRMM   (France)

Author keywords

[No Author keywords available]

Indexed keywords

BANDPASS FILTERS; CASCADE CONNECTIONS; COMPUTER SIMULATION; CONTROLLABILITY; ELECTRIC NETWORK PARAMETERS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; LINEAR INTEGRATED CIRCUITS; OBSERVABILITY; OPERATIONAL AMPLIFIERS; PERFORMANCE;

ANALOG INTEGRATED CIRCUITS; DESIGN FOR TESTABILITY; MULTI-CONFIGURATION TECHNIQUE;

INTEGRATED CIRCUIT TESTING;

EID: 0029698148     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)