|
Volumn , Issue , 1996, Pages 315-318
|
Hardware emulation for functional verification of K5
a a a a a a |
Author keywords
[No Author keywords available]
|
Indexed keywords
COMPUTER AIDED LOGIC DESIGN;
COMPUTER AIDED NETWORK ANALYSIS;
COMPUTER ARCHITECTURE;
COMPUTER HARDWARE;
COMPUTER SIMULATION;
EQUIVALENT CIRCUITS;
ITERATIVE METHODS;
MATHEMATICAL MODELS;
FUNCTIONAL DESIGN VERIFICATION;
K5 MICROPROCESSOR;
QUICKTURN HARDWARE EMULATION SYSTEM;
MICROPROCESSOR CHIPS;
|
EID: 0029698043
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/240518.240578 Document Type: Conference Paper |
Times cited : (29)
|
References (5)
|