Verification of multi-valued logic networks

Proceedings of The International Symposium on Multiple-Valued Logic

Volumn , Issue , 1996, Pages 10-15

  Drechsler, Rolf ^a  

^a UNIVERSITY OF FREIBURG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED LOGIC DESIGN; COMPUTER SIMULATION; GRAPH THEORY; HEURISTIC METHODS; LOGIC CIRCUITS; LOGIC GATES; TREES (MATHEMATICS);

MULTI VALUED LOGIC NETWORKS; ORDERED BINARY DECISION DIAGRAMS; ORDERED MULTIVALUED DECISION DIAGRAMS; PRIMARY INPUT; PRIMARY OUTPUT;

MANY VALUED LOGICS;

EID: 0029696606     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (22)