Delay and power expressions for a CMOS inverter driving a resistive-capacitive load

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 4, Issue , 1996, Pages 101-104

  Adler, Victor ^a   Friedman, Eby G ^a  

^a UNIVERSITY OF ROCHESTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC LOADS; ELECTRIC WAVEFORMS; ELECTRIC WIRE; ENERGY DISSIPATION; LINEAR PROGRAMMING; MATHEMATICAL MODELS; OPTIMIZATION; SHORT CIRCUIT CURRENTS;

ALPHA POWER LAW MODEL; RESISTIVE CAPACITIVE LOAD; SHORT CIRCUIT POWER DISSIPATION;

ELECTRIC INVERTERS;

EID: 0029696478     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)