Pipelined VLSI with module structure design for discrete wavelet transforms

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 4, Issue , 1996, Pages 352-355

  Sheu, Ming Hwa ^a   Cheng, Shun Fa ^a   Shieh, Ming Der ^a  

^a NATIONAL YUNLIN UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTER SIMULATION; PIPELINE PROCESSING SYSTEMS; WAVELET TRANSFORMS;

ACCURACY ANALYSIS; OUTPUT THROUGHPUT RATE;

VLSI CIRCUITS;

EID: 0029695937     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)