Performance estimation in a simultaneous multithreading processor

IEEE International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems - Proceedings

Volumn , Issue , 1996, Pages 97-101

  Serrano, Mauricio J ^a  

^a IBM ALMADEN RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CALCULATIONS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SIMULATION; COMPUTER SOFTWARE; ESTIMATION; MARKOV PROCESSES; MATHEMATICAL MODELS; PERFORMANCE; PIPELINE PROCESSING SYSTEMS; PROBABILITY; PROGRAM PROCESSORS;

INSTRUCTIONS EXECUTED PER CYCLE; MULTITHREADING PROCESSOR; SIMULTANEOUS MULTITHREADING; SUPERSCALAR ARCHITECTURE;

PARALLEL PROCESSING SYSTEMS;

EID: 0029694125     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)