Vertical MOS technology with sub-0.1 μm channellengths

Electronics Letters

Volumn 31, Issue 16, 1995, Pages 1394-1396

  Gossner, G ^a   Wittmann, F ^a   Eisele, I ^a   Grabolla, T ^b   Behammer, D ^c  

^a BUNDESWEHR UNIVERSITY MUNICH   (Germany)

^b Institut für Halbleiterphysik   (Germany)

^c RUHR UNIVERSITY BOCHUM   (Germany)

Author keywords

Molecular beam epitaxial growth MOSFETs

Indexed keywords

COMPUTER SIMULATION; CONSTRAINT THEORY; CURRENT VOLTAGE CHARACTERISTICS; EPITAXIAL GROWTH; ESTIMATION; MOLECULAR BEAM EPITAXY;

CHANNEL LENGTH; MOLECULAR BEAM EPITAXIAL GROWTH; STANDARD SIMULATION; VERTICAL MOS TECHNOLOGY;

MOSFET DEVICES;

EID: 0029634682     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19950890     Document Type: Article

References (7)

1. SAI-HALASZ, G.A., WORDEMAN, M. R., KERN, D.P., GANIN, E., RISHTON, S., ZICHERMAN, D.S., SCHMID, H., POLCARI, M.R., NG, H.Y., RESTLE, P.J., CHANG, T.H.P., and DENNARD, R.H.: ‘Design and experimental technology for 0.1 pm gate length low-temperature operation FETs’, IEEE Electron Device Lett., 1987, EDL-8. pp. 463-466
2. ONO, M., SAITO, M., YOSHITOMI, T., KIEGNA, C., OHGURO, T., and IWAI, H.: ‘Sub-50nm gate length n-MOSFETs with 10nm phosphorus source and drain junctions’. Proc. IEDM'93, December 1993, (Washington. DC, USA), pp. 119-122
3. GOSSNER, H., EISELE, L, and RISCH, L.: ‘Vertical Si-metal-oxide- semiconductor field effect transistors with channel lengths of 50 nm by molecular beam epitaxy’. Jpn. J. Appl. Phys., 1994. 33, pp. 2423-2428
4. GOSSNER, H.: ‘Feldeffektgesteuerte Siliziumbauelemente in Nanometerdimensionen’, PhD Thesis, Universität der Bundeswehr, Munich, November 1994
5. ATLAS II: A device simulator of Silvaco International, Santa Clara. CA
6. The CVT-mobility model of the ATLAS II simulator was applied. User's manual ATLAS, Silvaco International. Santa Clara, 2nd edition (1994), pp. 5.12-5.14
7. OHMI, T., KOTANI, K., TERAMOTO, A., and MIYASHITA, M.: ‘Dependence of electron channel mobility on Si-SiO, interface micro roughness’, IEEE Electron Device Lett., 1991, 12, pp. 652- 654