Multilevel monolithic inductors in silicon technology

Electronics Letters

Volumn 31, Issue 5, 1995, Pages 359-360

  Soyuer, M ^a   Burghartz, J N ^a   Jenkins, K A ^a   Ponnapalli, S ^a   Ewen, J F ^a   Pence, W E ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

BiCMOS integrated circuits; Inductors; MMIC

Indexed keywords

BIPOLAR INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; COMPUTER SIMULATION LANGUAGES; ELECTRIC LOSSES; MONOLITHIC MICROWAVE INTEGRATED CIRCUITS; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE STRUCTURES; VLSI CIRCUITS;

BI CMOS; METAL LAYERS; MULTILEVEL MONOLITHIC INDUCTORS; SILICON TECHNOLOGY;

ELECTRIC INDUCTORS;

EID: 0029632717     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19950241     Document Type: Article

References (5)

1. NGUYEN, N.M., and MEYER, R.O.: ‘Si IC-compatible inductors and LC passive filters’, IEEE J, Solid-State Circuits, 1990, SC-25, (4), pp. 1028-1031
2. CHANG, J.Y.-C, ABIDI, A., and GAITAN, M.: ‘Large suspended inductors on silicon and their use in a 2-µm CMOS RF amplifier’, IEEE Electron Device Lett., 1993, EDL-14, (5), pp. 246-248
3. ASHBY, K., KOULLXIAS, I., FINLEY, W., BASTEK, J., and MOINIAN, S.: ‘High Q inductors for wireless applications in a complementary silicon bipolar process’. Proc. IEEE Bipolar/BiCMOS Circuits and Tech. Meet., October 1994. pp. 179-182
4. PONNAPALLI, s., DEUTCH, A., ana BERTIN, R.: ‘A package analysis tool based on a method of moments surface formulation’, IEEE Trans., 1993, CHMT-16, (8), pp. 884-892
5. GROSS, J., CHUANG, H., and SCHMERBECK, T.: ‘State-of-the-art analog BiCMOS’. IEEE GaAsIC Symp., October 1993