Interconnect scaling - the real limiter to high performance ULSI

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1995, Pages 241-244

  Bohr, Mark T ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ASPECT RATIO; CAPACITANCE; CONDUCTIVE MATERIALS; DIELECTRIC MATERIALS; INTEGRATED CIRCUIT LAYOUT; MECHANICAL PROPERTIES; PERMITTIVITY; RELIABILITY;

INTERCONNECT DELAY; INTERCONNECT SCALING;

ULSI CIRCUITS;

EID: 0029547914     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)